Weak atomicity for the x86 memory consistency model

  • Authors:
  • Amitabha Roy;Steven Hand;Tim Harris

  • Affiliations:
  • University of Cambridge, Computer Laboratory, Cambridge CB30FD, UK;University of Cambridge, Computer Laboratory, Cambridge CB30FD, UK;Microsoft Research, UK

  • Venue:
  • Journal of Parallel and Distributed Computing
  • Year:
  • 2012

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Abstract

We consider the interaction of weakly atomic Software Transactional Memory (STM) providing single global lock atomicity with the x86 memory consistency model. We show that a practical design for such an STM requires that some program behaviour be disallowed, due to the strictness of the x86 memory consistency model in comparison to the language level memory models hitherto considered in weakly atomic STM designs. We present the design and construction of such an STM that disallows races between a transactional read and a non-transactional write. We also report on a practical application of this STM to elide legacy locks in x86 binaries. This allows software transactional memory to be applied without requiring software to be a priori written with awareness of transactional memory and without any restriction on source language or compiler. As an example, we show how a mainstream multiplayer game can use transactional memory with zero changes and 11% overhead over language level transactional memory, which requires over 700 annotations and severely restricts software development.