The potential for variable-granularity access tracking for optimistic parallelism
Proceedings of the 2008 ACM SIGPLAN workshop on Memory systems performance and correctness: held in conjunction with the Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '08)
RingSTM: scalable transactions with a single atomic instruction
Proceedings of the twentieth annual symposium on Parallelism in algorithms and architectures
Software transactional memory: why is it only a research toy?
Communications of the ACM - Remembering Jim Gray
Software Transactional Memory: Why Is It Only a Research Toy?
Queue - The Concurrency Problem
A comprehensive strategy for contention management in software transactional memory
Proceedings of the 14th ACM SIGPLAN symposium on Principles and practice of parallel programming
xCalls: safe I/O in memory transactions
Proceedings of the 4th ACM European conference on Computer systems
A runtime system for software lock elision
Proceedings of the 4th ACM European conference on Computer systems
Reducing Memory Ordering Overheads in Software Transactional Memory
Proceedings of the 7th annual IEEE/ACM International Symposium on Code Generation and Optimization
Parallel event processing for content-based publish/subscribe systems
Proceedings of the Third ACM International Conference on Distributed Event-Based Systems
Proactive transaction scheduling for contention management
Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture
NOrec: streamlining STM by abolishing ownership records
Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
Speculative parallelization using software multi-threaded transactions
Proceedings of the fifteenth edition of ASPLOS on Architectural support for programming languages and operating systems
An efficient software transactional memory using commit-time invalidation
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
CC'08/ETAPS'08 Proceedings of the Joint European Conferences on Theory and Practice of Software 17th international conference on Compiler construction
Lightweight, robust adaptivity for software transactional memory
Proceedings of the twenty-second annual ACM symposium on Parallelism in algorithms and architectures
Generating low-overhead dynamic binary translators
Proceedings of the 3rd Annual Haifa Experimental Systems Conference
RETCON: transactional repair without replay
Proceedings of the 37th annual international symposium on Computer architecture
DISC'10 Proceedings of the 24th international conference on Distributed computing
A scalable lock-free universal construction with best effort transactional hardware
DISC'10 Proceedings of the 24th international conference on Distributed computing
Weak atomicity under the x86 memory consistency model
Proceedings of the 16th ACM symposium on Principles and practice of parallel programming
Hardware acceleration of transactional memory on commodity systems
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
Hybrid binary rewriting for memory access instrumentation
Proceedings of the 7th ACM SIGPLAN/SIGOPS international conference on Virtual execution environments
Transactional conflict decoupling and value prediction
Proceedings of the international conference on Supercomputing
Anywhere, any-time binary instrumentation
Proceedings of the 10th ACM SIGPLAN-SIGSOFT workshop on Program analysis for software tools
Fastpath speculative parallelization
LCPC'09 Proceedings of the 22nd international conference on Languages and Compilers for Parallel Computing
Hardware transactional memory for GPU architectures
Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture
Computation vs. memory systems: pinning down accelerator bottlenecks
ISCA'10 Proceedings of the 2010 international conference on Computer Architecture
Weak atomicity for the x86 memory consistency model
Journal of Parallel and Distributed Computing
Sandboxing transactional memory
Proceedings of the 21st international conference on Parallel architectures and compilation techniques
A transactional runtime system for the Cell/BE architecture
Journal of Parallel and Distributed Computing
Energy efficient GPU transactional memory via space-time optimizations
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
SI-TM: reducing transactional memory abort rates through snapshot isolation
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems
Software Transactional Memory for GPU Architectures
Proceedings of Annual IEEE/ACM International Symposium on Code Generation and Optimization
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With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising programming model allowing programmers to focus on parallelism rather than maintaining correctness and avoiding deadlock. Many implementations of hardware, software, and hybrid support for TM have been proposed; of these, software-only implementations (STMs) are especially compelling since they can be used with current commodity hardware. However, in addition to higher overheads, many existing STM systems are limited to either managed languages or intrusive APIs. Furthermore, transactions in STMs cannot normally contain calls to unobservable code such as shared libraries or system calls. In this paper we present JudoSTM, a novel dynamic binary-rewriting approach to implementing STM that supports C and C++ code. Furthermore, by using value-based conflict detection, JudoSTM additionally supports the transactional execution of both (i) irreversible system calls and (ii) library functions that may contain locks. We significantly lower overhead through several novel optimizations that improve the quality of rewritten code and reduce the cost of conflict detection and buffering. We show that our approach performs comparably to Rochester's RSTM library-based implementation--demonstrating that a dynamic binary-rewriting approach to implementing STM is an interesting alternative.