Wireless sensor networks: a survey
Computer Networks: The International Journal of Computer and Telecommunications Networking
A Novel Measure for Quantifying the Topology Preservation of Self-Organizing Feature Maps
Neural Processing Letters
Self-organizing maps with recursive neighborhood adaptation
Neural Networks - New developments in self-organizing maps
2005 Special issue: FPGA implementation of self organizing map with digital phase locked loops
Neural Networks - 2005 Special issue: IJCNN 2005
A RECONFIGURABLE GAUSSIAN/TRIANGULAR BASIS FUNCTIONS COMPUTATION CIRCUIT
AICCSA '06 Proceedings of the IEEE International Conference on Computer Systems and Applications
Communication coverage in wireless passive sensor networks
IEEE Communications Letters
IEEE Transactions on Neural Networks
Analog implementation of a Kohonen map with on-chip learning
IEEE Transactions on Neural Networks
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An efficient transistor level implementation of a flexible, programmable Triangular Function (TF) that can be used as a Triangular Neighborhood Function (TNF) in ultra-low power, self-organizing maps (SOMs) realized as Application-Specific Integrated Circuit (ASIC) is presented. The proposed TNF block is a component of a larger neighborhood mechanism, whose role is to determine the distance between the winning neuron and all neighboring neurons. Detailed simulations carried out for the software model of such network show that the TNF forms a good approximation of the Gaussian Neighborhood Function (GNF), while being implemented in a much easier way in hardware. The overall mechanism is very fast. In the CMOS 0.18 @mm technology, distances to all neighboring neurons are determined in parallel, within the time not exceeding 11 ns, for an example neighborhood range, R, of 15. The TNF blocks in particular neurons require another 6 ns to calculate the output values directly used in the adaptation process. This is also performed in parallel in all neurons. As a result, after determining the winning neuron, the entire map is ready for the adaptation after the time not exceeding 17 ns, even for large numbers of neurons. This feature allows for the realization of ultra low power SOMs, which are hundred times faster than similar SOMs realized on PC. The signal resolution at the output of the TNF block has a dominant impact on the overall energy consumption as well as the silicon area. Detailed system level simulations of the SOM show that even for low resolutions of 3 to 6 bits, the learning abilities of the SOM are not affected. The circuit performance has been verified by means of transistor level Hspice simulations carried out for different transistor models and different values of supply voltage and the environment temperature - a typical procedure completed in case of commercial chips that makes the obtained results reliable.