Co-synthesis of hardware and software for digital embedded systems
Co-synthesis of hardware and software for digital embedded systems
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Surviving the SOC revolution: a guide to platform-based design
Surviving the SOC revolution: a guide to platform-based design
Automatic communication refinement for system level design
Proceedings of the 40th annual Design Automation Conference
Ant system: optimization by a colony of cooperating agents
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
System-level design: orthogonalization of concerns and platform-based design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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To facilitate the design of SoC (System-on-a-Chip), we present a hardware/software co-design environment called HSCDE. In this paper, some critical techniques related to HSCDE are revealed, including Platform-Based SoC modeling technology and ant algorithm based hardware/software partitioning technology. HSCDE environment divides SoC hardware/software co-design processes into three design levels, and it also supports the mappings among these design levels by two design mapping processes. Experimental results show that HSCDE effectively supports hierarchical Platform-Based SoC hardware/software co-design methodology, and further statistics reveal that an average of 10%~25% revisions on platform templates are required to get a new SoC design.