BlackjackBench: portable hardware characterization

Authors:
Anthony Danalis;Piotr Luszczek;Jack Dongarra;Gabriel Marin;Jeffrey S. Vetter
Affiliations:
University of Tennessee & Oak Ridge National Laboratory, Knoxville, TN, USA;University of Tennessee, Knoxville, TN, USA;University of Tennessee & Oak Ridge National Laboratory & University of Manchester, Knoxville, TN, USA;Oak Ridge National Laboratory, Oak Ridge, TN, USA;Oak Ridge National Laboratory, Oak Ridge, TN, USA
Venue:
Proceedings of the second international workshop on Performance modeling, benchmarking and simulation of high performance computing systems
Year:
2011

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Abstract

DARPA's AACE project aimed to develop Architecture Aware Compiler Environments that automatically characterize the hardware and optimize the application codes accordingly. We present the BlackjackBench suite, a collection of portable micro-benchmarks that automate system characterization, plus statistical analysis techniques for interpreting the results. The BlackjackBench discovers the effective sizes and speeds of the hardware environment rather than the often unattainable peak values. We aim at hardware features that can be observed by running executables generated by existing compilers from standard C codes. We characterize the memory hierarchy, including cache sharing and NUMA characteristics of the system, properties of the processing cores affecting execution speed, and the length of the OS scheduler time slot. We show how these features of modern multicores can be discovered programmatically. We also show how the features could interfere with each other resulting in incorrect interpretation of the results, and how established classification and statistical analysis techniques reduce experimental noise and aid automatic interpretation of results.