Another view on parallel speedup
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Hitting the memory wall: implications of the obvious
ACM SIGARCH Computer Architecture News
The M5 Simulator: Modeling Networked Systems
IEEE Micro
APC: a performance metric of memory systems
ACM SIGMETRICS Performance Evaluation Review
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Due to the infamous "memory wall" problem and a drastic increase in the number of data intensive applications, memory rather than processor has become the leading performance bottleneck of modern computing systems. Evaluating and understanding memory system performance is increasingly becoming the core of high-end computing. Conventional memory metrics, such as miss ratio, average miss latency, average memory access time, etc., are designed to measure a given memory performance parameter, and do not reflect the overall performance of a memory system. On the other hand, widely used system performance metrics, such as IPC and Flops are designed to measure CPU performance, and are not appropriate for memory performance. In this study, we propose a novel memory metric, Access Per Cycle (APC), to measure overall memory performance with consideration of the complexity of modern memory systems. A unique contribution of APC is its separation of memory evaluation from CPU evaluation. Simulation results show that APC is significantly more appropriate than existing memory metrics in evaluating modern memory systems.