Two-level adaptive training branch prediction
MICRO 24 Proceedings of the 24th annual international symposium on Microarchitecture
The effect of speculatively updating branch history on branch prediction accuracy, revisited
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
The impact of delay on the design of branch predictors
Proceedings of the 33rd annual ACM/IEEE international symposium on Microarchitecture
Design tradeoffs for the Alpha EV8 conditional branch predictor
ISCA '02 Proceedings of the 29th annual international symposium on Computer architecture
ARM System-on-Chip Architecture
ARM System-on-Chip Architecture
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Merging path and gshare indexing in perceptron branch prediction
ACM Transactions on Architecture and Code Optimization (TACO)
The Impact of Branch Direction History Combined with Global Branch History in Branch Prediction
IEICE - Transactions on Information and Systems
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Correct branch prediction is an essential task in modern microarchitectures. In this paper, to additionally increase the prediction accuracy, recovery logics for speculative update branch history are presented. In local or global branch predictors, maintaining speculative update history provides substantial prediction accuracy. However, speculative update history requires a suitable recovery mechanism. This paper proposes recovery logics for speculative update branch history, for both global- and local-history. The proposed solutions provide higher prediction accuracy and guarantee the correctness of program, and they can be efficiently implemented with low hardware costs.