A high performance heterogeneous architecture and its optimization design

Authors:
Jianjun Guo;Kui Dai;Zhiying Wang
Affiliations:
School of Computer, National University of Defense Technology, Changsha, Hunan, China;School of Computer, National University of Defense Technology, Changsha, Hunan, China;School of Computer, National University of Defense Technology, Changsha, Hunan, China
Venue:
HPCC'06 Proceedings of the Second international conference on High Performance Computing and Communications
Year:
2006

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Abstract

The widely adoption of media processing applications provides great challenges to high performance embedded processor design. This paper studies a Data Parallel Coprocessor architecture based on SDTA and architecture de-cisions are made for the best performance/cost ratio. Experimental results on a prototype show that SDTA has high performance to run many embedded media processing applications. The simplicity and flexibility of SDTA encourages for further development for its reconfigurable functionality.