Can out-of-order instruction execution in multiprocessors be made sequentially consistent?

Authors:
Lisa Higham;Jalal Kawash
Affiliations:
Department of Computer Science, The University of Calgary, Canada;Department of Computer Science, American University of Sharjah, UAE
Venue:
NPC'05 Proceedings of the 2005 IFIP international conference on Network and Parallel Computing
Year:
2005

Citing 7
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Abstract

We investigate all possible combinations of re-ordering of read and write instructions and their effects on the correctness of programs that are designed for sequential consistency. With certain combinations of re-orderings, any program that accesses shared memory through only reads and writes and that is correct assuming sequential consistency, can be transformed to a new program that does not use any explicit synchronization, and that remains correct in spite of the instruction re-ordering. With other combinations of re-ordering, such transformations do not exist, without resorting to explicit synchronization.