Cache conscious trees on modern microprocessors

Authors:
Ig-hoon Lee;Jae-won Lee;Junho Shim;Sang-goo Lee
Affiliations:
seoul National University, Daehak-dong, Kwanak-gu, Seoul, Korea;seoul National University, Daehak-dong, Kwanak-gu, Seoul, Korea;Sookmyung Women's University, Hyochangwon-gil, Yongsan-gu, Seoul, Korea;Seoul National University, Daehak-dong, Kwanak-gu, Seoul, Korea
Venue:
Proceedings of the 4th International Conference on Uniquitous Information Management and Communication
Year:
2010

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Abstract

Recent research shows that database performance can be significantly improved by the effective cache utilization of conventional microprocessors. Researchers have modified existing index structures into ones optimized for CPU cache performance in main memory database environments. The Cache Sensitive B+-Tree and recently developed Cache Sensitive T-Tree are the most well-known cache conscious index structures. In this paper, we present an experimental performance study to show how cache conscious trees perform on different types of modern CPU processors. We perform experiment evaluation on basic tree operations, search, range search, and insertion/deletion operation.