Robust, generic, modularly-verified map: a software verification challenge problem
Proceedings of the 5th ACM workshop on Programming languages meets program verification
The 1st verified software competition: experience report
FM'11 Proceedings of the 17th international conference on Formal methods
Mathematics throughout the CS curriculum
Journal of Computing Sciences in Colleges
Mathematical reasoning at the crossroads
ACM Inroads
The location linking concept: a basis for verification of code using pointers
VSTTE'12 Proceedings of the 4th international conference on Verified Software: theories, tools, experiments
Automatically proving thousands of verification conditions using an SMT solver: an empirical study
NFM'12 Proceedings of the 4th international conference on NASA Formal Methods
A case study in verification of embedded network software
NFM'12 Proceedings of the 4th international conference on NASA Formal Methods
Specification engineering and modular verification using a web-integrated verifying compiler
Proceedings of the 34th International Conference on Software Engineering
The roles of mathematics in computer science
ACM Inroads
Special session: "hands-on" tutorial: teaching software correctness with RESOLVE
Proceedings of the 45th ACM technical symposium on Computer science education
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A central objective of the verifying compiler grand challenge is to develop a push-button verifier that generates proofs of correctness in a syntax-driven fashion similar to the way an ordinary compiler generates machine code. The software developer’s role is then to provide suitable specifications and annotated code, but otherwise to have no direct involvement in the verification step. However, the general mathematical developments and results upon which software correctness is based may be established through a separate formal proof process in which proofs might be mechanically checked, but not necessarily automatically generated. While many ideas that could conceivably form the basis for software verification have been known “in principle” for decades, and several tools to support an aspect of verification have been devised, practical fully automated verification of full software behavior remains a grand challenge. This paper explains how RESOLVE takes a step towards addressing this challenge by integrating foundational and practical elements of software engineering, programming languages, and mathematical logic into a coherent framework. Current versions of the RESOLVE verifier generate verification conditions (VCs) for the correctness of component-based software in a modular fashion—one component at a time. The VCs are currently verified using automated capabilities of the Isabelle proof assistant, the SMT solver Z3, a minimalist rewrite prover, and some specialized decision procedures. Initial experiments with the tools and further analytic considerations show both the progress that has been made and the challenges that remain.