Scheduling Processes with Release Times, Deadlines, Precedence and Exclusion Relations
IEEE Transactions on Software Engineering
Synthesis of embedded software using free-choice Petri nets
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Combined Task and Message Scheduling in Distributed Real-Time Systems
IEEE Transactions on Parallel and Distributed Systems
Formal synthesis and code generation of embedded real-time software
Proceedings of the ninth international symposium on Hardware/software codesign
A Framework for Scheduler Synthesis
RTSS '99 Proceedings of the 20th IEEE Real-Time Systems Symposium
Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine
Come, Let's Play: Scenario-Based Programming Using LSC's and the Play-Engine
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This paper shows an approach for software synthesis in embedded hard real-time systems starting from Live Sequence Charts (LSC) scenarios as specification language. As the name suggests, LSCs specify liveness, that is, things that must happen. Therefore allowing the distinction between possible and necessary behavior as well as the specification of possible anti-scenarios. Embedded software has become much harder to design due to the diversity of requirements and high complexity. In such systems, correctness and timeliness verification is an issue to be concerned. The software synthesis method takes a specification (in this case composed by LSC scenarios) and automatically generates a program source code where: (i) functionalities and constraints are satisfied; and (ii) operational support for task’s execution is provided. This paper adopts a time Petri net (TPN) formalism for system modeling in order to find feasible pre-runtime schedules, and for synthesizing predictable and timely scheduled code. Embedded software synthesis has been receiving much attention. However, few works deal with software synthesis for hard real-time systems considering arbitrary precedence and exclusion relations.