Formal synthesis and code generation of embedded real-time software
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Scheduler Modeling Based on the Controller Synthesis Paradigm
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Concurrent Embedded Real-Time Software Verification
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HSCC '00 Proceedings of the Third International Workshop on Hybrid Systems: Computation and Control
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Nordic Journal of Computing
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Formal Methods in System Design
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ACC'09 Proceedings of the 2009 conference on American Control Conference
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TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
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Theoretical Computer Science
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In this paper we present a framework integrating specification and scheduler generation for real-time systems. In a first step, the system, which can include arbitrarily designed tasks (cyclic or sporadic, with or without precedence constraints, any number of resources and CPUs) is specified as a timed Petri-net. In a second step, our tool generates the most general non-preemptive online scheduler for the specification, using a controller synthesis technique.