Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
SIGMETRICS '87 Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems
UNIX internals: the new frontiers
UNIX internals: the new frontiers
Memory systems and pipelined processors
Memory systems and pipelined processors
Hardware Compressed Main Memory: Operating System Support and Performance Evaluation
IEEE Transactions on Computers
Linkers and Loaders
Adaptive Compressed Caching: Design and Implementation
SBAC-PAD '03 Proceedings of the 15th Symposium on Computer Architecture and High Performance Computing
Compiler-assisted demand paging for embedded systems with flash memory
Proceedings of the 4th ACM international conference on Embedded software
Memory overflow protection for embedded systems using run-time checks, reuse and compression
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
MTSS: multi task stack sharing for embedded systems
Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems
Operating System Concepts
The slab allocator: an object-caching kernel memory allocator
USTC'94 Proceedings of the USENIX Summer 1994 Technical Conference on USENIX Summer 1994 Technical Conference - Volume 1
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Both the hardware cost and power consumption of computer systems heavily depend on the size of main memory, namely DRAM. This becomes important especially in tiny embedded systems (e.g., micro sensors) since they are produced in a large-scale and have to operate as long as possible, e.g., ten years. Although several methods have been developed to reduce the program code and data size, most of them need extra hardware devices, making them unsuitable for the tiny systems. For example, virtual memory system needs both MMU and TLB devices to execute large-size program on a small memory. This paper presents a software reproduction of the virtual memory system especially focusing on paging mechanism. In order to logically expand the physical memory space, the proposed method compacts, compresses, and swaps in/out heap memory blocks, which typically form over half of the whole memory size. A prototype implementation verifies that the proposed method can expand memory capacity by over twice. As a result, large size programs run in parallel with a reasonable overhead, comparable to that of hardware-based VM systems.