A high-speed parallel architecture for stereo matching

Authors:
Sungchan Park;Hong Jeong
Affiliations:
Electronic amd Electrical Engineering, Pohang University of Science and Technology, Pohang, Kyungbuk, South Korea;Electronic amd Electrical Engineering, Pohang University of Science and Technology, Pohang, Kyungbuk, South Korea
Venue:
ISVC'06 Proceedings of the Second international conference on Advances in Visual Computing - Volume Part I
Year:
2006

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Abstract

The stereo matching algorithm based on the belief propagation (BP) has the low matching error as the global method, but has the disadvantage of a long processing time. In addition to a low error of less than 2.6% in the Middlebury image simulation, a new architecture based on BP shows a high-speed parallel VLSI structure of the time complexity O(N), at properly small iterations, so that it can be useful as a chip in the real-time application like robots and navigations.