Quasi-delay-insensitive computing device: methodological aspects and practical implementation

Authors:
Yuri Stepchenkov;Yuri Diachenko;Victor Zakharov;Yuri Rogdestvenski;Nikolai Morozov;Dmitri Stepchenkov
Affiliations:
Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia;Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia;Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia;Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia;Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia;Institute of Informatics Problems, Russian Academy of Sciences, Moscow, Russia
Venue:
PATMOS'09 Proceedings of the 19th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
Year:
2009

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Abstract

The approaches to self-timed hardware design are presented. The conditions of intersystem integration of synchronous and self-timed devices are considered through the example of the quasi-delay-insensitive computing device development. This device performs functions of division and square root extraction. It operates with numbers of single and double precisions corresponding to the IEEE 754 standard.