Reliability of majority voting based VLSI fault-tolerant circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Device and architecture concurrent optimization for FPGA transient soft error rate
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
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Embedded devices used for spacecraft, satellites, and space stations are vulnerable to the effects of high-energy charged particles. To resolve single-event latch-up (SEL)-associated troubles more flexibly using limited hardware resources in a space environment, reconfigurable devices such as field programmable gate arrays (FPGAs) are suitable. However, such reconfigurable systems present the shortcoming that the circuit itself on the gate array is not robust. The configuration context on a configuration SRAM also suffers from single-event upsets (SEUs) and SELs. This paper therefore proposes an MEMS dynamic optically reconfigurable gate array that is usable under a space radiation environment. The technique enables rapid recovery of a programmable device that has been damaged by high-energy charged particles. It uses incorrect configuration data including some error bits that had been damaged by particles. The configuration data are transferred using wireless communications and are retained on an EEPROM/SRAM.