An FPGA-based real-time event sampler

Authors:
Niels Penneman;Luc Perneel;Martin Timmerman;Bjorn De Sutter
Affiliations:
Electronics and Informatics Department, Vrije Universiteit Brussel, Brussel, Belgium;Dedicated Systems Experts, St-Pieters-Leeuw, Belgium;Electronics and Informatics Department, Vrije Universiteit Brussel, Brussel, Belgium;Electronics and Informatics Department, Vrije Universiteit Brussel, Brussel, Belgium
Venue:
ARC'10 Proceedings of the 6th international conference on Reconfigurable Computing: architectures, Tools and Applications
Year:
2010

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Abstract

This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test whether real-time events are handled in time on such systems. By designing and implementing the sampler as a logic analyzer on an FPGA, several design parameters can be explored and easily modified to match the behavior of different kinds of embedded systems. Moreover, the trade-off between price and performance becomes easy, as it mainly exists of choosing the appropriate type and speed grade of an FPGA family.