Hardware for modular exponentiation suitable for smart cards

  • Authors:
  • Luiza de Macedo Mourelle;Nadia Nedjah

  • Affiliations:
  • Department of Systems Engineering and Computation, Faculty of Engineering, State University of Rio de Janeiro, Brazil;Department of Electronics Engineering and Telecommunications, Faculty of Engineering, State University of Rio de Janeiro, Brazil

  • Venue:
  • ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
  • Year:
  • 2004

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Abstract

Smart cards use integrated circuits instead of magnetic tape. Its architecture includes a processor, memory, input/output and, possibly, a cryptographic coprocessor. The cost of smart cards is directly related to the size of the integrated circuit. Our present focus is the cryptographic coprocessor, which usually uses a public-key cryptosystem. In these cryptosystems, the main operation is the modular exponentiation, which is performed using successive modular multiplications. This operation is time consuming for large operands, which is always the case in cryptography. Here, performance is another matter of concern. For fast software or hardware cryptosystems, one needs thus to reduce the total number of modular multiplications required. In this paper, we propose a fast and compact hardware for computing modular exponentiation using the m-ary methods, applying the addition chain method for the pre-processing step. The cryptographic hardware is low-cost and concise, offering a good solution for smart cards.