A chip-package-board co-design methodology
Proceedings of the 49th Annual Design Automation Conference
Multiple chip planning for chip-interposer codesign
Proceedings of the 50th Annual Design Automation Conference
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The vast majority of IC's that go into production must reside on a Printed Circuit Board (PCB). Unfortunately, the design and layout of this PCB is often an afterthought and never considered in the planning of the chip itself. The result is a PCB that is very difficult to complete on a minimal number of layers and signal integrity is often compromised. This often creates a huge bottleneck in the time it takes a chip to ship in volume and often cuts into a company's profit margin. This bottleneck (and additional cost) can be greatly reduced by implementing a cross-domain co-design methodology that considers the physical layout requirements of the PCB (without looking over the package substrate) in the context of floor-planning the chip.