Performance improvement of hardware-based packet classification algorithm

  • Authors:
  • Yaw-Chung Chen;Pi-Chung Wang;Chun-Liang Lee;Chia-Tai Chan

  • Affiliations:
  • Department of Computer Science and Information Engineering, National Chiao Tung University, HsinChu, Taiwan, R.O.C.;Telecommunication Laboratories, Chunghwa Telecom Co., Ltd., Taipei, Taiwan, R.O.C.;Telecommunication Laboratories, Chunghwa Telecom Co., Ltd., Taipei, Taiwan, R.O.C.;Telecommunication Laboratories, Chunghwa Telecom Co., Ltd., Taipei, Taiwan, R.O.C.

  • Venue:
  • ICN'05 Proceedings of the 4th international conference on Networking - Volume Part II
  • Year:
  • 2005

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Abstract

Packet classification is important in fulfilling the requirements of differentiated services in next generation networks. In the previous work, we presented an efficient hardware scheme, Condensate Bit Vector, based on bit vectors. The scheme significantly improves the scalability of packet classification. In this work, the characteristics of Condensate Bit Vector are further illustrated, and two drawbacks that may negatively affect the performance of Condensate Bit Vector are revealed. We show the solution to resolve the weaknesses and introduce the new schemes, Condensate Ordered Bit Vector and Condensate and Aggregate Ordered Bit Vector. Experiments show that our new algorithms drastically improve the search speed as compared to the original algorithm.