Revisiting shared virtual memory systems for non-coherent memory-coupled cores

  • Authors:

  • Stefan Lankes;Pablo Reble;Oliver Sinnen;Carsten Clauss

  • Affiliations:

  • RWTH Aachen University, Aachen, Germany;RWTH Aachen University, Aachen, Germany;University of Auckland, Auckland, New Zealand;RWTH Aachen University, Aachen, Germany

  • Venue:
  • Proceedings of the 2012 International Workshop on Programming Models and Applications for Multicores and Manycores
  • Year:
  • 2012

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Abstract

The growing number of cores per chip implies an increasing chip complexity, especially with respect to hardware-implemented cache coherence protocols. An attractive alternative for future many-core systems is to waive the hardware-based cache coherency and to introduce a software-oriented approach instead: a so-called Cluster-on-Chip architecture. The Single-chip Cloud Computer (SCC) is a recent research processor of such architectures. This paper presents an approach to deal with the missing cache coherence protocol by using a software managed cache coherence system, which is based on the well-established concept of a shared virtual memory (SVM) management system. Through SCC's unique features like a new memory type, which is directly integrated on the processor die, new and capable options exist to realize an SVM system. The convincing performance results presented in this paper show that nearly forgotten concepts will become attractive again for future many-core systems.