Scheduling pipelined multiprocessor tasks: an experimental study with vision architecture

Authors:
M. Fikret Ercan
Affiliations:
School of Electrical and Electronic Engineering, Singapore Polytechnic, Singapore
Venue:
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and Its Applications - Volume Part III
Year:
2005

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Abstract

This paper presents the application scheduling algorithms on a class of multiprocessor architectures that exploit temporal and spatial parallelism simultaneously. The hardware platform is a multi-level or partitionable architecture. Spatial parallelism is exploited with MIMD type processor clusters (or layers) and temporal parallelism is exploited by pipelining operations on those independent clusters. In order to fully exploit system's capacity, multi processor tasks (MPTs) that are executed on such system should be scheduled appropriately. In our earlier study, we have proposed scheduling algorithms based on well known local search heuristic algorithms such as simulated annealing, tabu search and genetic algorithm and their performances were tested computationally by using a set of randomly generated test data. In this paper, we present application of these scheduling algorithms on a multilayer architecture which is designed as a visual perception unit of an autonomous robot and evaluate performance improvement achieved.