Parallel computing: theory and comparisons
Parallel computing: theory and comparisons
A methodology for the development of general knowledge-based vision systems
Vision, brain, and cooperative computation
The warp computer: Architecture, implementation, and performance
IEEE Transactions on Computers
A prototype pyramid machine for hierarchical cellular logic
Parallel computer vision
The connection machine
A report on the results of the DARPA integrated image understanding benchmark exercise
Proceedings of a workshop on Image understanding workshop
Supporting systolic and memory communication in iWarp
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Parallel Integrated Technology for Image Processing
Parallel Integrated Technology for Image Processing
Parallel Architectures and Parallel Algorithms for Integrated Vision Systems
Parallel Architectures and Parallel Algorithms for Integrated Vision Systems
A Distributed Management Scheme for Partitionable Parallel Computers
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Experimental Application-Driven Architecture Analysis of an SIMD/MIMD Parallel Processing System
IEEE Transactions on Parallel and Distributed Systems
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A critique of multiprocessing von Neumann style
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
The ICAP Parallel Processor Communications Switch
The ICAP Parallel Processor Communications Switch
Parallel architectures and parallel algorithms for integrated vision systems
Parallel architectures and parallel algorithms for integrated vision systems
Computer Vision Algorithms on Reconfigurable Logic Arrays
IEEE Transactions on Parallel and Distributed Systems
Performance Evaluation of Heuristics for Scheduling Pipelined Multiprocessor Tasks
ICCS '01 Proceedings of the International Conference on Computational Sciences-Part I
System-on-programmable-chip implementation for on-line face recognition
Pattern Recognition Letters
Tradeoffs in designing accelerator architectures for visual computing
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Performance of local search heuristics on scheduling a class of pipelined multiprocessor tasks
Computers and Electrical Engineering
Scheduling pipelined multiprocessor tasks: an experimental study with vision architecture
ICCSA'05 Proceedings of the 2005 international conference on Computational Science and Its Applications - Volume Part III
| Hi-index | 0.00 |
Computer vision is regarded as one of the most complex and computationally intensiveproblems. In general, a Computer Vision System (CVS) attempts to relate scene(s) interms of model(s). A typical CVS employs algorithms from a very broad spectrum such as numerical, image processing, graph algorithms, symbolic processing, and artificialintelligence. The authors present a multiprocessor architecture, called "NETRA," forcomputer vision systems. NETRA is a highly flexible architecture. The topology of NETRA is recursively defined, and hence, is easily scalable from small to large systems. It is a hierarchical architecture with a tree-type control hierarchy. Its leaf nodes consists of a cluster of processors connected with a programmable crossbar with selective broadcast capability to provide the desired flexibility. The processors in clusters can operate in SIMD-, MIMD- or Systolic-like modes. Other features of the architecture include integration of limited data-driven computation within a primarily control flow mechanism, block-level control and data flow, decentralization of memory management functions, and hierarchical load balancing and scheduling capabilities. The paper also presents a qualitative evaluation and preliminary performance results of a cluster of NETRA.