A Burst-Mode Oriented Back-End for the Balsa Synthesis System
Proceedings of the conference on Design, automation and test in Europe
Principles of Asynchronous Circuit Design: A Systems Perspective
Principles of Asynchronous Circuit Design: A Systems Perspective
Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors
IEEE Design & Test
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This paper aims at introducing a method to quickly design compact dual-rail asynchronous primitives. If the proposed cells are dedicated to the design of dual-rail asynchronous circuits, it is also possible to use such primitives to design dual-rail synchronous circuits. The method detailed herein has been applied to develop the schematics of various basic primitives. The performances of the 130nm obtained cells have been simulated and compared with more traditional implementations.