Theoretical Computer Science
Verification of real-time designs: combining scheduling theory with automatic formal verification
ESEC/FSE-7 Proceedings of the 7th European software engineering conference held jointly with the 7th ACM SIGSOFT international symposium on Foundations of software engineering
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Partial-Order Methods for the Verification of Concurrent Systems: An Approach to the State-Explosion Problem
CIL: Intermediate Language and Tools for Analysis and Transformation of C Programs
CC '02 Proceedings of the 11th International Conference on Compiler Construction
All from One, One for All: on Model Checking Using Representatives
CAV '93 Proceedings of the 5th International Conference on Computer Aided Verification
KISS: keep it simple and sequential
Proceedings of the ACM SIGPLAN 2004 conference on Programming language design and implementation
Efficient timed model checking for discrete-time systems
Theoretical Computer Science
Reducing Concurrent Analysis Under a Context Bound to Sequential Analysis
CAV '08 Proceedings of the 20th international conference on Computer Aided Verification
Monotonic Partial Order Reduction: An Optimal Symbolic Partial Order Reduction Technique
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Reducing Context-Bounded Concurrent Reachability to Sequential Reachability
CAV '09 Proceedings of the 21st International Conference on Computer Aided Verification
Real-Time Systems: Theory and Practice
Real-Time Systems: Theory and Practice
Proceedings of the 38th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Context-bounded translations for concurrent software: an empirical evaluation
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
SPIN'10 Proceedings of the 17th international SPIN conference on Model checking software
Improving spin's partial-order reduction for breadth-first search
SPIN'05 Proceedings of the 12th international conference on Model Checking Software
A Survey of Automated Techniques for Formal Software Verification
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Asynchronous programs with prioritized task-buffers
Proceedings of the ACM SIGSOFT 20th International Symposium on the Foundations of Software Engineering
CSeq: a sequentialization tool for C
TACAS'13 Proceedings of the 19th international conference on Tools and Algorithms for the Construction and Analysis of Systems
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Real-Time Embedded Software (RTES) constitutes an important sub-class of concurrent safety-critical programs. We consider the problem of verifying functional correctness of periodic RTES, a popular variant of RTES that execute periodic tasks in an order determined by Rate Monotonic Scheduling (RMS). A computational model of a periodic RTES is a finite collection of terminating tasks that arrive periodically and must complete before their next arrival. We present an approach for time-bounded verification of safety properties in periodic RTES. Our approach is based on sequentialization. Given an RTES C and a time-bound W, we construct (and verify) a sequential program S that over-approximates all executions of C up to time W, while respecting priorities and bounds on the number of preemptions implied by RMS. Our algorithm supports partial-order reduction, preemption locks, and priority locks. We implemented our approach for C programs, with properties specified via user-provided assertions. We evaluated our tool on several realistic examples, and were able to detect a subtle concurrency issue in a robot controller.