Fast-settling CMOS Op-Amp with improved DC-gain

Authors:
Ali Dadashi;Shamin Sadrafshari;Khayrollah Hadidi;Abdollah Khoei
Affiliations:
Electrical Engineering Department and Microelectronic Research Laboratory, Urmia University, Urmia, Iran;Electrical Engineering Department and Microelectronic Research Laboratory, Urmia University, Urmia, Iran;Electrical Engineering Department and Microelectronic Research Laboratory, Urmia University, Urmia, Iran;Electrical Engineering Department and Microelectronic Research Laboratory, Urmia University, Urmia, Iran
Venue:
Analog Integrated Circuits and Signal Processing
Year:
2012

Citing 3
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Design of Analog CMOS Integrated Circuits
An enhanced folded cascode Op-Amp using positive feedback and bulk amplification in 0.35 μm CMOS process

Analog Integrated Circuits and Signal Processing

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Abstract

In this paper a new operational amplifier is presented based on the conventional folded cascode Op-Amp structure. A new method of positive feedback is used to increase DC-gain. Contrary to conventional designs this method does not decrease the speed of the folded cascode Op-Amp in the closed loop configuration. Simplicity is the other advantage of the proposed Op-Amp in comparison with the conventional structures. In this method, DC-gain improves by adding only two devices to the folded cascode structure. The additional devices neither decrease the bandwidth nor increase the power consumption, to a great extent. Proposed structure has been simulated by HSPICE software using level 49 parameters (BSIM3v3) in a typical 0.35 μm CMOS technology. HSPICE simulation confirms the theoretical estimated improvements.