Improving the performance of GCC by exploiting IA-64 architectural features

Authors:
Canqun Yang;Xuejun Yang;Jingling Xue
Affiliations:
School of Computer Science, National University of Defense Technology, Changsha, Hunan, China;School of Computer Science, National University of Defense Technology, Changsha, Hunan, China;Programming Languages and Compilers Group, School of Computer Science and Engineering, The University of New South Wales, Sydney, Australia
Venue:
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Year:
2005

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Abstract

The IA-64 architecture provides a rich set of features to aid the compiler in exploiting instruction-level parallelism to achieve high performance. Currently, GCC is a widely used open-source compiler for IA-64, but its performance, especially its floating-point performance, is poor compared to that of commercial compilers because it has not fully utilized IA-64 architectural features. Since late 2003 we have been working on improving the performance of GCC on IA-64. This paper reports four improvements on enhancing its floating-point performance, namely alias analysis for FORTRAN (its part for COMMON variables already committed in GCC 4.0.0), general induction variable optimization, loop unrolling and prefetching arrays in loops. These improvements have significantly improved the floating-point performance of GCC on IA-64 as extensively validated using SPECfp2000 and NAS benchmarks.