Code size reduction by compiler tuning

Authors:
Masayo Haneda;Peter M. W. Knijnenburg;Harry A. G. Wijshoff
Affiliations:
LIACS, Leiden University, Leiden, The Netherlands;LIACS, Leiden University, Leiden, The Netherlands;LIACS, Leiden University, Leiden, The Netherlands
Venue:
SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Year:
2006

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Abstract

Code size is a main cost factor for many high volume electronic devices. It is therefore important to reduce the size of the applications in an embedded system. Several methods have been proposed to deal with this problem, mostly based on compressing the binaries. In this paper, we approach the problem from a different perspective. We try to exploit the back end code optimizations present in a production compiler to generate as few assembly instructions as possible. This approach is based on iterative compilation in which many different versions of the code are tested. We employ statistical analysis to identify the compiler options that have the largest effect on code size. We have applied this technique to gcc 3.3.4 using the MediaBench suite and four target architectures. We show that in almost all cases we produce shorter codes than the standard setting -Os does which is designed to optimize for size. In some cases, we generate code that is 30% shorter than -Os.