Architecture and evaluation of a high-speed networking subsystem for distributed-memory systems

  • Authors:
  • P. Steenkiste;M. Hemy;T. Mummert;B. Zill

  • Affiliations:
  • School of Computer Science, Carnegie Mellon University, Pittsburgh, Pennsylvania;School of Computer Science, Carnegie Mellon University, Pittsburgh, Pennsylvania;School of Computer Science, Carnegie Mellon University, Pittsburgh, Pennsylvania;School of Computer Science, Carnegie Mellon University, Pittsburgh, Pennsylvania

  • Venue:
  • ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
  • Year:
  • 1994

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Abstract

Achieving high-speed network I/O on distributed-memory systems is difficult because their architecture is in general ill-suited for communication processing. Some of the common problems are: inability to do protocol processing, inefficient handling of data distribution, and poor management of the I/O. In this paper we present an I/O architecture that addresses these problems and supports high-speed network I/O on distributed-memory systems. The key to good performance is to partition the work appropriately between the system and the network interface. We perform some communication tasks on the distributed-memory parallel system since it is more powerful, and less likely to become a bottleneck than the network interface. Tasks that do not parallelize well are performed on the network interface and hardware support is provided for the most time-critical operations. We emphasize the use of simple I/O mechanisms that can be used by programming tools that map applications on the distributed-memory system to implement efficient I/O for the class of applications they support.This architecture has been implemented for the iWarp distributed-memory system. We describe this implementation and present performance results.