Solving problems on concurrent processors. Vol. 1: General techniques and regular problems
Solving problems on concurrent processors. Vol. 1: General techniques and regular problems
Computational models for parallel computers
Scientific applications of multiprocessors
Reconfigurable transputer networks: practical concurrent computation
Scientific applications of multiprocessors
Executing DSP Applications in a Fine-Grained Dataflow Environment
IEEE Transactions on Software Engineering
The IBM Victor V256 partitionable multiprocessor
IBM Journal of Research and Development
Architecture and evaluation of a high-speed networking subsystem for distributed-memory systems
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
A high-speed network interface for distributed-memory systems: architecture and applications
ACM Transactions on Computer Systems (TOCS)
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The paper traces the development of large multi-transputer systems for high-performance scientific and engineering computing. After defining what we mean by 'supercomputing' in the context of this paper, the past and present state of transputer supercomputing environments is illustrated by a discussion of three specific projects. These are the Esprit 'SuperNode' project or P1085, the Edinburgh Concurrent Supercomputer project and the Victor project at IBM Research in Yorktown Heights. The present parallel programming environments available for transputer systems are also briefly reviewed. The paper concludes with a look to the future. Inmos' announced plans for the next generation transputer, code-named H1, are described along with a comparison with the new Intel iWarp chip. We can classify this Intel component as a 'generic' transputer in that it integrates computing elements, memory elements and communication hardware on a single VLSI chip. Both these new components should make for a bright future for supercomputing with transputer-like building blocks.