Handbook of Applied Cryptography
Handbook of Applied Cryptography
An Efficient Algorithm for Software Generation of Binary Linear Recurrences
Applicable Algebra in Engineering, Communication and Computing
Application of LFSRs in time/memory trade-off cryptanalysis
WISA'05 Proceedings of the 6th international conference on Information Security Applications
Synthesis of parallel binary machines
Proceedings of the International Conference on Computer-Aided Design
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We consider the problem of efficiently generating sequences in hardware for use in certain cryptographic algorithms. The conventional method of doing this is to use a counter. We show that sequences generated by linear feedback shift registers (LFSRs) can be tailored to suit the appropriate algorithms. For hardware implementation, this reduces both time and chip area. As a result, we are able to suggest improvements to the design of DES Cracker built by the Electronic Frontier Foundation in 1998; provide an efficient strategy for generating start points in time-memory trade/off attacks; and present an improved parallel hardware implementation of a variant of the counter mode of operation of a block cipher.