Hiding circuit topology from unbounded reverse engineers

  • Authors:
  • Yu Yu;Jussipekka Leiwo;Benjamin Premkumar

  • Affiliations:
  • School of Computer Engineering, Nanyang Technological University, Singapore;School of Computer Engineering, Nanyang Technological University, Singapore;School of Computer Engineering, Nanyang Technological University, Singapore

  • Venue:
  • ACISP'06 Proceedings of the 11th Australasian conference on Information Security and Privacy
  • Year:
  • 2006

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Abstract

Circuit/program obfuscation, if possible, would have a number of applications to cryptography and software protection. Unfortunately, negative results have been given by Barak et al. [1] that universal obfuscators (for circuits or programs) do not exist. In other words, given a circuit, an adversary might obtain more information (e.g. core algorithm) other than its input-output behavior. In this paper, we discuss the problem of circuit obfuscation under a weaker assumption where the adversary knows only partial information regarding the circuit, namely, the circuit topology (i.e., all information regarding the circuit except the functionalities of its gates), then how can C be obfuscated such that the circuit topology of the resulting circuit C′ (denoted by Topo(C′)) discloses nothing substantial? In practice, the scenario corresponds to that a reverse engineer attempts to illegally copy a circuit by passively analyzing how its gates are inter-wired. Our results are quite positive: there exist efficient circuit topology obfuscation algorithms that transform every circuit C with size s to circuit C′ with the same input-output behavior, size slog3s and depth slog(logs), where Topo(C′) reveals nothing more than circuit size, input length and output length in an information-theoretic sense.