Architectural support for copy and tamper resistant software
ACM SIGPLAN Notices
Handbook of Applied Cryptography
Handbook of Applied Cryptography
The IBM PCIXCC: a new cryptographic coprocessor for the IBM eServer
IBM Journal of Research and Development
A combined hardware and software architecture for secure computing
Proceedings of the 2nd conference on Computing frontiers
Aegis: a single-chip secure processor
Aegis: a single-chip secure processor
A cache design for a security architecture for microprocessors (SAM)
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
SP 800-38A 2001 edition. Recommendation for Block Cipher Modes of Operation: Methods and Techniques
SP 800-38A 2001 edition. Recommendation for Block Cipher Modes of Operation: Methods and Techniques
Memory encryption: A survey of existing techniques
ACM Computing Surveys (CSUR)
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In this paper we revisit SAM, a security architecture for microprocessors that provides memory encryption and memory verification using hash values, including a summary of its main features and an overview of other related architectures. We analyze the security of SAM architecture as originally proposed, pointing out some weaknesses in security and performance. To overcome them, we supply another hashing and protection schemes which strengthen the security and improve the performance of the first proposal. Finally, we present some experimental results comparing the old and new schemes.