Optimisation of the parallel performance of a 3d device simulator for HEMTs

Authors:
N. Seoane;A. J. García-Loureiro
Affiliations:
Department of Electronics and Computer Engineering, Univ. Santiago de Compostela, Spain;Department of Electronics and Computer Engineering, Univ. Santiago de Compostela, Spain
Venue:
ISPA'06 Proceedings of the 4th international conference on Parallel and Distributed Processing and Applications
Year:
2006

Citing 3
Cited 0

The stationary semiconductor device equations

The stationary semiconductor device equations
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Iterative Methods for Sparse Linear Systems
The effects of unsymmetric matrix permutations and scalings in semiconductor device and circuit simulation

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

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Abstract

The resolution of the linear systems generated by the discretisation of partial differential equations in semiconductor device simulation is the most time consuming part of the simulation process. In this paper we have presented an optimisation proposal of the linear systems resolution procedure used in the PSPARSLIB library. The linear systems employed in this work arise from a three–dimensional parallel simulator of semiconductor devices, specifically HEMTs, based on the drift–diffusion model. This optimisation increases the parallel efficiency of the simulation process and improves its scalability.