Compiler-Directed energy-time tradeoff in MPI programs on DVS-Enabled parallel systems

Authors:
Huizhan Yi;Juan Chen;Xunjun Yang
Affiliations:
Section 620, School of Computer, National University of Defense Technology, Changsha, Hunan, P.R. China;Section 620, School of Computer, National University of Defense Technology, Changsha, Hunan, P.R. China;Section 620, School of Computer, National University of Defense Technology, Changsha, Hunan, P.R. China
Venue:
ISPA'06 Proceedings of the 4th international conference on Parallel and Distributed Processing and Applications
Year:
2006

Citing 11
Cited 0

Design issues for dynamic voltage scaling

ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
An overview of the BlueGene/L Supercomputer

Proceedings of the 2002 ACM/IEEE conference on Supercomputing
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction

PLDI '03 Proceedings of the ACM SIGPLAN 2003 conference on Programming language design and implementation
Environment for Multiprocessor Simulator Development

ISPAN '00 Proceedings of the 2000 International Symposium on Parallel Architectures, Algorithms and Networks
Compiler-directed dynamic voltage and frequency scaling for cpu power and energy reduction

Compiler-directed dynamic voltage and frequency scaling for cpu power and energy reduction
Power and Energy Profiling of Scientific Applications on Distributed Systems

IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
Exploring the Energy-Time Tradeoff in MPI Programs on a Power-Scalable Cluster

IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Papers - Volume 01
A Power-Aware Run-Time System for High-Performance Computing

SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Performance-constrained Distributed DVS Scheduling for Scientific Applications on Power-aware Clusters

SC '05 Proceedings of the 2005 ACM/IEEE conference on Supercomputing
Minimizing execution time in MPI programs on an energy-constrained, power-scalable cluster

Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming
Scheduling for reduced CPU energy

OSDI '94 Proceedings of the 1st USENIX conference on Operating Systems Design and Implementation

Quantified Score

Hi-index	0.00

Visualization

Abstract

Although parallel systems with high peak performance have been exciting, high peak performance often means high power consumption. In this paper, power-aware parallel systems are investigated, where each node can make dynamic voltage scaling (DVS). Based on the characteristics of communication and memory access in MPI programs, a compiler is used to automatically form communication and computation regions, and to optimally assign frequency and voltage to the regions. Frequency and voltage of each node are dynamically adjusted, and energy consumption is minimized within the limit of performance loss. The results from simulations and experiments show that compiler-directed energy-time tradeoff can save 20~40% energy consumption with less than 5% performance loss.