Fast Regular Expression Matching Using FPGAs
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Algorithms to accelerate multiple regular expressions matching for deep packet inspection
Proceedings of the 2006 conference on Applications, technologies, architectures, and protocols for computer communications
Fast and memory-efficient regular expression matching for deep packet inspection
Proceedings of the 2006 ACM/IEEE symposium on Architecture for networking and communications systems
An improved algorithm to accelerate regular expression evaluation
Proceedings of the 3rd ACM/IEEE Symposium on Architecture for networking and communications systems
A hybrid finite automaton for practical deep packet inspection
CoNEXT '07 Proceedings of the 2007 ACM CoNEXT conference
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Deep packet inspection at high speed has become extremely important due to its applications in network services. In deep packet inspection applications, regular expressions have gradually taken the place of explicit string patterns for its powerful expression ability. Unfortunately, the requirements of memory space and bandwidth using traditional methods are prohibitively high. In this paper, we propose a novel scheme of deep packet inspection based on non-uniform distribution of network traffic. The new scheme separates a set of regular expressions into several groups with different priorities and compiles the groups attaching different priorities with different methods. When matching, the scanning sequence of rules is consistent with their priorities. The experiment results show that the proposed protocol recognition performs 10 to 30 times faster than the traditional NFA-based approach and hold a reasonable memory requirement.