Wiring considerations in analog VLSI systems, with application to field-programmable networks
Wiring considerations in analog VLSI systems, with application to field-programmable networks
VLSI analogs of neuronal visual processing: a synthesis of form and function
VLSI analogs of neuronal visual processing: a synthesis of form and function
Communicating neuronal ensembles between neuromorphic chips
Neuromorphic systems engineering
Design of a real-time face detection parallel architecture using high-level synthesis
EURASIP Journal on Embedded Systems - Special issue on design and architectures for signal and image processing
Performance study of synthetic AER generation on CPUs for real-time video based on spikes
SPECTS'09 Proceedings of the 12th international conference on Symposium on Performance Evaluation of Computer & Telecommunication Systems
Performance study of software AER-based convolutions on a parallel supercomputer
IWANN'11 Proceedings of the 11th international conference on Artificial neural networks conference on Advances in computational intelligence - Volume Part I
Test infrastructure for address-event-representation communications
IWANN'05 Proceedings of the 8th international conference on Artificial Neural Networks: computational Intelligence and Bioinspired Systems
On algorithmic rate-coded AER generation
IEEE Transactions on Neural Networks
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Neuro-inspired processing tries to imitate the nervous system and may resolve complex problems, such as visual recognition. The spike-based philosophy based on the Address-Event-Representation (AER) is a neuromorphic interchip communication protocol that allows for massive connectivity between neurons. Some of the AER-based systems can achieve very high performances in real-time applications. This philosophy is very different from standard image processing, which considers the visual information as a succession of frames. These frames need to be processed in order to extract a result. This usually requires very expensive operations and high computing resource consumption. Due to its relative youth, nowadays AER systems are short of cost-effective tools like emulators, simulators, testers, debuggers, etc. In this paper the first results of a CUDA-based tool focused on the functional processing of AER spikes is presented, with the aim of helping in the design and testing of filters and buses management of these systems.