Dynamic resource tuning for flexible core chip multiprocessors

Authors:
Yongqing Ren;Hong An;Tao Sun;Ming Cong;Yaobin Wang
Affiliations:
School of Computer Science and Technology, University of Science and Technology of China, Hefei, Anhui, China;School of Computer Science and Technology, University of Science and Technology of China, Hefei, Anhui, China;School of Computer Science and Technology, University of Science and Technology of China, Hefei, Anhui, China;School of Computer Science and Technology, University of Science and Technology of China, Hefei, Anhui, China;School of Computer Science and Technology, University of Science and Technology of China, Hefei, Anhui, China
Venue:
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part II
Year:
2010

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Abstract

Technology evolving has forced the coming of chip multiprocessors (CMP) era, and enabled architects to place an increasing number of cores on single chip. For the abundance of computing resources, a fundamental problem is how to map application on it, or how many cores should be assigned for each application. As the available concurrency varies widely for diverse applications or different execution phases of an individual program, the number of resource allocated should be adjusted dynamically for high utilization rate while not compromising performance. In this paper, aiming at resource management in flexible architecture, an implementation of confidence predictor, referred as speculative depth estimator (SDE), is introduced, which is able to conduct the real-time resource tuning. By applying the speculative depth estimator to dynamic resource tuning, the experiments results show that a good trade-off between concurrency exploitation and resource utilization is achieved.