Communicating sequential processes
Communicating sequential processes
CTL and ECTL as fragments of the modal &mgr;-calculus
Theoretical Computer Science - Selected papers of the 17th Colloquium on Trees in Algebra and Programming (CAAP '92) and of the European Symposium on Programming (ESOP), Rennes, France, Feb. 1992
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Reasoning about infinite computations
Information and Computation
Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Three logics for branching bisimulation
Journal of the ACM (JACM)
Verification of concurrent software with FLAVERS
ICSE '97 Proceedings of the 19th international conference on Software engineering
Automatically validating temporal safety properties of interfaces
SPIN '01 Proceedings of the 8th international SPIN workshop on Model checking of software
POPL '02 Proceedings of the 29th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
POPL '77 Proceedings of the 4th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Communication and Concurrency
The Theory and Practice of Concurrency
The Theory and Practice of Concurrency
Modal Transition Systems: A Foundation for Three-Valued Program Analysis
ESOP '01 Proceedings of the 10th European Symposium on Programming Languages and Systems
Tree-Like Counterexamples in Model Checking
LICS '02 Proceedings of the 17th Annual IEEE Symposium on Logic in Computer Science
Incremental Verification by Abstraction
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Finding Feasible Counter-examples when Model Checking Abstracted Java Programs
TACAS 2001 Proceedings of the 7th International Conference on Tools and Algorithms for the Construction and Analysis of Systems
Construction of Abstract State Graphs with PVS
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
ESTL: A Temporal Logic for Events and States
ICATPN '98 Proceedings of the 19th International Conference on Application and Theory of Petri Nets
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Yet Another Process Logic (Preliminary Version)
Proceedings of the Carnegie Mellon Workshop on Logic of Programs
Computation tree logic and regular omega-languages
Linear Time, Branching Time and Partial Order in Logics and Models for Concurrency, School/Workshop
Analysis of Discrete Event Coordination
Stepwise Refinement of Distributed Systems, Models, Formalisms, Correctness, REX Workshop
Modular verification of software components in C
Proceedings of the 25th International Conference on Software Engineering
The Temporal Logic of Rewriting: A Gentle Introduction
Concurrency, Graphs and Models
Bug hunting with false negatives
IFM'07 Proceedings of the 6th international conference on Integrated formal methods
A model checking approach for verifying COWS specifications
FASE'08/ETAPS'08 Proceedings of the Theory and practice of software, 11th international conference on Fundamental approaches to software engineering
FMICS'07 Proceedings of the 12th international conference on Formal methods for industrial critical systems
The linear temporal logic of rewriting Maude model checker
WRLA'10 Proceedings of the 8th international conference on Rewriting logic and its applications
Temporal property verification as a program analysis task
CAV'11 Proceedings of the 23rd international conference on Computer aided verification
A state/event temporal deontic logic
DEON'06 Proceedings of the 8th international conference on Deontic Logic and Artificial Normative Systems
A logical verification methodology for service-oriented computing
ACM Transactions on Software Engineering and Methodology (TOSEM)
Temporal property verification as a program analysis task
Formal Methods in System Design
Compositional verification and 3-valued abstractions join forces
SAS'07 Proceedings of the 14th international conference on Static Analysis
A Rewriting-Based Model Checker for the Linear Temporal Logic of Rewriting
Electronic Notes in Theoretical Computer Science (ENTCS)
Reasoning about nondeterminism in programs
Proceedings of the 34th ACM SIGPLAN conference on Programming language design and implementation
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In the domain of concurrent software verification, there is an evident need for specification formalisms and efficient algorithms to verify branching-time properties that involve both data and communication. We address this problem by defining a new branching-time temporal logic SE-A${\it \Omega}$ which integrates both state-based and action-based properties. SE-A${\it \Omega}$ is universal, i.e., preserved by the simulation relation, and thus amenable to counterexample-guided abstraction refinement. We provide a model-checking algorithm for this logic, based upon a compositional abstraction-refinement loop which exploits the natural decomposition of the concurrent system into its components. The abstraction and refinement steps are performed over each component separately, and only the model checking step requires an explicit composition of the abstracted components. For experimental evaluation, we have integrated our algorithm within the ComFort reasoning framework and used it to verify a piece of industrial robot control software.