MORSE: Multi-objective reconfigurable self-optimizing memory scheduler

  • Authors:
  • Janani Mukundan;Jose F. Martinez

  • Affiliations:
  • Computer Systems Laboratory, Cornell University, Ithaca, NY, 14850 USA;Computer Systems Laboratory, Cornell University, Ithaca, NY, 14850 USA

  • Venue:
  • HPCA '12 Proceedings of the 2012 IEEE 18th International Symposium on High-Performance Computer Architecture
  • Year:
  • 2012

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Abstract

We propose a systematic and general approach to designing self-optimizing memory schedulers that can target arbitrary figures of merit (e.g., performance, throughput, energy, fairness). Using our framework, we instantiate three memory schedulers that target three important metrics: performance and energy efficiency of parallel workloads, as well as throughput/fairness of multiprogrammed workloads. Our experiments show that the resulting hardware significantly outperforms the state of the art in all cases.