Analog IC Design with Low-Dropout Regulators (LDOs)
Analog IC Design with Low-Dropout Regulators (LDOs)
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
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We present a design for a low-dropout regulator suitable for use as a radio-frequency identification (RFID) tag IC that offers low power consumption while accommodating large load current variations using a small on-chip storage capacitor. Because of the low power design constraint, both the input and output impedances of the embedded current buffer are included for regulator stability analysis. A damping factor control technique is employed to ensure stability for the regulator with a small on-chip capacitor. Our analysis shows that the regulator provides a phase margin of greater than 45° over the full load current variation from 1 to 500 μA. Measurements show that the output voltage variation is less than 110 mV when the input voltage changes from 2.5 to 4 V under the same conditions of load current change, which indicates that the performance of the regulator is suitable for the RFID tag IC. The regulator consumes 10 μA of current and generates a nominal output of 1.8 V. The regulator design technique was successfully implemented in a fully-integrated HF-band passive RFID tag IC that satisfies the ISO-14443 type-B protocol. The tag chip is fabricated in a 1-poly 6-metal low-power 0.18 μm CMOS technology with a CoSi2-Schottky diode and EEPROM process.