Pipelined parallel FFT architectures via folding transformation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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An efficient algorithm for computing the real-valued FFT (of length N) using radix-2 decimation-in-frequency (DIF) approach has been introduced. The fact that the odd coefficients are the DFT values of an N/2-length linear phase sequence introduces a redundancy in the form of the symmetry X(2k+1)=X*(N-2k-1), which can be exploited to reduce the arithmetic complexity and memory requirements. The arithmetic complexity and, memory requirements of the algorithm presented are exactly the same as the most efficient decimation-in-time (DIT) algorithm for the real-valued FFT that exists to date. A C++ program that implements this algorithm has been included