Application of filter sharpening to cascaded integrator-combdecimation filters

  • Authors:
  • A.Y. Kwentus;Zhongnong Jiang;A.N. Willson, Jr.

  • Affiliations:
  • Dept. of Electr. Eng., California Univ., Los Angeles, CA;-;-

  • Venue:
  • IEEE Transactions on Signal Processing
  • Year:
  • 1997

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Abstract

A new architecture for the implementation of high-order decimation filters is described. It combines the cascaded integrator-comb (CIC) multirate filter structure with filter sharpening techniques to improve the filter's passband response. This allows the first-stage CIC decimation filter to be followed by a fixed-coefficient second-stage filter, rather than a programmable filter, thereby achieving a significant hardware reduction over existing approaches. Furthermore, the use of fixed-coefficient filters in place of programmable-coefficient filters improves the overall throughput rate. The resulting architecture is well suited for single-chip VLSI implementation with very high data-sample rates. We discuss an example with specifications suitable for use in a wideband satellite communication subband tuner system and for signal analysis