An efficient hardware design of a system for highly nonstationary signals filtering
ACACOS'08 Proceedings of the 7th WSEAS International Conference on Applied Computer and Applied Computational Science
Journal of Real-Time Image Processing
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An efficient multiple clock cycle implementation (MCI) of a flexible system for space/spatial-frequency signal analysis is proposed. It is designed by extending the 1-D MCI architecture to the 2-D case. The proposed system can implement various (almost all commonly used) 2-D space/spatial-frequency distributions (S/SFDs) based on the 2-D short-time Fourier transform (STFT) elements. The designed system is very flexible, since it allows the implemented S/SFDs to take different numbers of clock cycles and to share functional kernel, known as the STFT-to-SM gateway, , within their execution. These are major advantages of the MCI approach, that enable one to optimize critical design performances such as hardware complexity, energy consumption, and cost. The proposed approach is verified by a real-time design of the field-programmable gate array chip that is capable of performing 2-D S/SFDs in real time