High level synthesis of integrated heterogeneous pipelined processing elements for DSP applications
Computers and Electrical Engineering
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The basic terminology, a review of the underlying theory, a detailed description, and the performance of an automatic multiprocessing scheduler are presented. This scheduler generates an optimal deterministic synchronous multiprocessor realization of a digital signal processing (DSP) algorithm. It provides a reasonable solution to the optimal multiprocessing scheduling problem for the class of digital filters commonly used in the DSP community. The experimental study of the performance of this scheduler emphasizes adaptive and nonadaptive digital filters