Design of efficient architectures for 1-D and 2-D DLMS adaptive filters
Integration, the VLSI Journal
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A systolic array design for an adaptive filter is presented. The filter is based on the least-mean-square algorithm, but due to the problems in implementation of the systolic array, a modified algorithm, a special case of the delayed LMS (DLMS), is used. The DLMS algorithm introduces a delay in the updating of the filter coefficients. The convergence and steady-state behavior of the systolic array are analyzed. It is shown that the performance of the systolic array is similar to that of a conventional LMS implementation for a wide range of practical conditions