Design of Silicon IP Cores for Biorthogonal Wavelet Transforms
Journal of VLSI Signal Processing Systems - Special issue on signal processing systems design and implementation
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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This correspondence extends the symmetric FIR filter algorithms of the previous work of the author to the computation of interpolators and decimators. We will show that the number of arithmetic operations in digital interpolation and decimation can be significantly reduced. As a result, we introduce a new class of efficient interpolator and decimator structures