CDMA/FDMA-interconnects for future ULSI communications
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Design of an interconnect architecture and signaling technology for parallelism in communication
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Conventional CDMA serial links suffer from the drawback that the number of transmitters is limited to only two in practical implementations due to the reduced voltage spacing between adjacent logic states of the transmitted data. In this letter, we propose a new CDMA serial link architect that allows an arbitrary number of transmitters to transmit data over the same channel while keeping the voltage spacing between adjacent logic states of the transmitted data to be the same as that of 4 pulse-amplitude-modulation serial link transmmitters. The effectiveness of the proposed architect is validated using the simulation results of a serial link with four transmitters designed in an IBM 130 nm 1.2 V CMOS technology.