Breaking the power delivery wall using voltage stacking

  • Authors:
  • Kaushik Mazumdar;Mircea Stan

  • Affiliations:
  • Dept of ECE, University of Virginia, Charlottesville, VA, USA;Dept of ECE, University of Virginia, Charlottesville, VA, USA

  • Venue:
  • Proceedings of the great lakes symposium on VLSI
  • Year:
  • 2012

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Abstract

We propose the use of voltage stacking for addressing some of the power delivery issues for many-core processors. To demonstrate the effectiveness of our method we first design a proxy for a many-core stacked processor in the form of a regular structure using multiple ring oscillators where we can control the voltage, frequency and switching activity for individual rings. For intermediate voltage rail regulation, we propose a push pull-based switched capacitor regulator designed specifically for balancing the stacked loads. Detailed Spice simulation results for the prototype model show a 4× reduction in supply current when using 4 layers of voltage stacking. We further validate our method by designing a voltage-stacked structure using two PIC cores.